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<div class=WordSection1> <h1>Single-Stage High Power Factor Flyback for LED Lighting</h1> <p><br></p> <h2 id="__Bookmark__0">Abstract</h2> <p class=MsoNormal>The application note illustrates how the single-stage high power factor flyback converter uses few components and a simple control method to increase input power factor (PF) and reduce input harmonic current. Its content includes the definition of PF, the operating principle of single-stage high power factor flyback converters, peak-current mode control, constant on-time control, feed-forward compensation and total harmonic distortion (THD) optimization.</p> <p class=MsoNormal><br> <br> </p> <h2 id="__Bookmark__1">1. Introduction</h2> <p>In recent years, the technology of light-emitting diodes (LED) has developed rapidly. As it has many advantages, such as high illumination efficiency, long service life, and being mercury free, it has been considered the main illumination source for the next generation. As the increasing environmentally friendly, the expectancy of LED is not only the higher brightness, but also the tougher energy saving requirement. Energy Star stipulates that the power factor of the lighting drivers for housing with power higher than 5W should be higher than 0.7, and that of commercial lighting driver should be higher than 0.9. The application note will discuss how LED lighting drivers use few components and a simple control method to increase input power factor (PF) and reduce input harmonic current in order to meet the requirements of the regulations and save energy.</p> <p><br> <br> </p> <h2 id="__Bookmark__2">2. Power Factor</h2> <p>Since our energy is running short, we people pay more attention to put more emphasis on the electrical efficiency of electronic devices. Most conventional power converters use a diode rectifier and electrolytic capacitor to rectify input power source. Although the structure is very simple, it results in serious non-linear distortion and creates a great number of low-frequency harmonics, which brings about a low power factor. Power factor is the ratio of real power and apparent power ;and it is the indicator and to determine its electrical efficiency. If the power factor is low, it will need more current to achieve the desired power output. If the current is increased, the energy loss of the circuit system will increase, too. Therefore, the capacitance of the related electrical equipment will also rise. In order to compensate for the cost of the equipment with capacity large capacitance and energy waste, the power company will charge more electricity fees from its industrial and commercial customers through a higher rates. </p> <p>The definition of the power factor is as follows : </p> <p class=MsoNormal><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image001_en.png" ><img width=307 height=29 id="圖片 1" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image001_en.png" alt="Technical Document Image Preview"></a></p> <p>where P stands for the real power, S stands for the apparent power, which is the product of the root mean square of the input voltage and that of the input current. The real power of a pure resistor load is equal to its apparent power, so its power factor is 1.</p> <p>If the load is a linear load consisting of inductors, capacitors and resistors, energy may repeatedly flow between the load and the power source, which will result in the reduction of the real power. If the circuit is composed of linear components and the voltage is a sine wave, the current will also be a sine wave with the same frequency; and the relation between the apparent power and real power will be :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image002_en.png" ><img width=308 height=25 id="圖片 8" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image002_en.png" alt="Technical Document Image Preview"></a></p> <p>where θ is the phase angle between the current and the voltage, and the power factor is cosθ, which is also called the displacement power factor (DPF).</p> <p>If there are other components different from inductors, capacitors and resistors in the load (non-linear load), the waveform of the input current may distort. Apparent power includes all harmonics. Thus, the power factor will not only be influenced by the displacement power factor resulting from the phase difference between the voltage and the current, but also the distortion power factor corresponding to the harmonics. Its definition is as follows: </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image003_en.png" ><img width=314 height=44 id="圖片 18" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image003_en.png" alt="Technical Document Image Preview"></a></p> <p>where THD<sub>i</sub> is the total harmonic distortion of the load current. I<sub>1,rms</sub> is the baseband component of the current, I<sub>rms</sub> is the total current, and both are expressed by root mean square. The above definition assumes that the voltage is still a sine wave without distortion. The assumption is very close to practical situations. The total power factor can be acquired by multiplying the distortion power factor by the displacement power factor, which is also called the real power factor or power factor : </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image004_en.png" ><img width=317 height=35 id="圖片 20" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image004_en.png" alt="Technical Document Image Preview"></a></p> <p>In order to unify the power factor of electronic devices, European Union regulates the harmonic standard-EN61000-3-2. For the purpose of passing the standard, electronic devices should have the power factor correction (PFC) technology. The application note will introduce the high power factor circuit for LED lighting later.</p> <p><br> <br> </p> <h2 id="__Bookmark__3">3. The Operating Principle of the High Power Factor Flyback Converter</h2> <p>In general, the power of LED lamp is lower than 100W. Thus, it is more appropriate to operate the power converter for driving LED lamp in critical conduction mode (CRM) or discontinuous conduction mode (DCM). Among all kinds of isolated switching converters, the flyback converter has least components and simplest structure. Therefore, LED lighting drivers usually use flyback converters operated in CRM or DCM. The circuit is shown in figure 1, and figure 2 is the ideal current waveform. According to the volt-second balance principle, the relation between the output voltage V<sub>O</sub> and input voltage V<sub>in</sub> is as follows:</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image005_en.png" ><img width=314 height=36 id="圖片 22" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image005_en.png" alt="Technical Document Image Preview"></a></p> <p>where D<sub>on</sub> stands for the conduction duty ratio of the power switch Q<sub>1</sub>, and D<sub>off</sub> stands for the conduction duty ratio of output diode D<sub>O</sub>, as shown in figure 2.</p> <p>The current-ripple of the magnetizing inductance L of the transformer TX<sub>1</sub> can be derived from Faraday’s law, which is as follows :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image006_en.png" ><img width=314 height=29 id="圖片 23" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image006_en.png" alt="Technical Document Image Preview"></a></p> <p>In CRM or DCM, the current will drop to zero at each switching period. Hence, the current-ripple will be equal to the peak current, as shown in equation (7). </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image007_en.png" ><img width=312 height=22 id="圖片 24" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image007_en.png" alt="Technical Document Image Preview"></a></p> <p>If the input voltage is a sine wave, the input voltage will be as follows :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image008_en.png" ><img width=314 height=26 id="圖片 25" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image008_en.png" alt="Technical Document Image Preview"></a></p> <p>where ω = 2π • f<sub>L</sub> ,f<sub>L</sub> is the input voltage frequency. Assuming that the on-time of the power switch can be controlled constant, and then the following equation can be derived :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image009_en.png" ><img width=313 height=30 id="圖片 26" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image009_en.png" alt="Technical Document Image Preview"></a></p> <p>That is to say, the peak current of the inductor is a sine wave with the same phase with the voltage, and its peak value is I<sub>L,pk</sub>.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image010_en.png" ><img width=316 height=25 id="圖片 27" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image010_en.png" alt="Technical Document Image Preview"></a></p> <p>If there is an electromagnetic interference (EMI) filter in front of the bridge-type rectifier, the angular frequency of the differential mode of the EMI filter will much lower than the switching frequency of the power switch Q<sub>1</sub>, but higher than the frequency f<sub>L</sub> of the input voltage. Thus, the input current is just the average value of the inductor ripple. According to the triangle averaging method, the input current can be expressed as the equation (11).</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image011_en.png" ><img width=317 height=35 id="圖片 28" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image011_en.png" alt="Technical Document Image Preview"></a></p> <p>If it is operated in DCM, t<sub>s</sub>(t) is constant. Therefore, the controller can make input current i<sub>in</sub>(t) and input voltage V<sub>in</sub>(t) have the same phase just by keeping t<sub>on</sub>(t) unchanged. Accordingly, the power factor is 1 in theory.</p> <p>If it is operated in CRM, t<sub>s</sub>(t) will vary with <sub>in</sub>(t). Therefore, i<sub>in</sub>(t) and V<sub>in</sub>(t) will not have the same phase even if the controller makes t<sub>on</sub>(t) constant. For this reason, the PF and THD of the flyback converter operated in CRM are slightly lower than that of the flyback converter operated in DCM. However, the peak current will be higher and it is more difficult to eliminate the EMI if it is operated in DCM. Hence, both of the controllers operated in DCM and CRM are useful.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image012_en.png" ><img width=394 height=214 id="圖片 3" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image012_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 1. The circuit diagram of the flyback converter </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image013_en.png" ><img width=280 height=248 id="圖片 10" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image013_en.png" alt="Technical Document Image Preview"></a></p> <p>(a) CRM </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image014_en.png" ><img width=270 height=225 id="圖片 11" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image014_en.png" alt="Technical Document Image Preview"></a></p> <p>(b) DCM </p> <p>Figure 2. The ideal current waveform diagram of the flyback converter </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image015_en.png" ><img width=329 height=254 id="圖片 12" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image015_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 3. The ideal current waveform diagram of the CRM flyback converter </p> <p>Figure 3 is the ideal current waveform of the flyback converter operated in CRM. Assuming that the power factor is 1, the root mean square of the input current can be expressed by <a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image016_en.png" ><img width=30 height=16 id="圖片 29" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image016_en.png" alt="Technical Document Image Preview"></a>the peak value of the average current. Based on the power relation, equation (12) can be derived. </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image017_en.png" ><img width=319 height=40 id="圖片 30" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image017_en.png" alt="Technical Document Image Preview"></a></p> <p>Equation (13), as follows, can be derived from equation (11) :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image018_en.png" ><img width=317 height=33 id="圖片 31" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image018_en.png" alt="Technical Document Image Preview"></a></p> <p>where t<sub>on,pk</sub> stands for t<sub>on</sub> of the input current with the peak value, so is t<sub>s,pk</sub>. <br> According to (10), (12) and (13), t<sub>on,pk</sub> can be expressed as follows :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image019_en.png" ><img width=317 height=41 id="圖片 32" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image019_en.png" alt="Technical Document Image Preview"></a></p> <p>From equation (14), it is obviously that the on-time t<sub>on</sub> will vary with the input voltage, input power, inductor L and switching period t<sub>s</sub>. </p> <p><br> <br> </p> <h2 id="__Bookmark__4">4. Peak Current Control and Constant On-time Control</h2> <p>Two common PFC control methods are peak current control and constant on-time control. They will be illustrated later.</p> <p class=MsoNormal>1.Peak current control : </p> <p>The input voltage should be detected if peak current PFC control is adopted. The function block diagram of the peak current PFC control is shown in figure. 4. In figure 4, V<sub>M</sub> is the rectified AC line voltage. V<sub>M</sub> is divided by resistors R<sub>M1</sub>, R<sub>M2</sub> and then enter the controller. Feedback signal V<sub>FB</sub> and reference voltage V<sub>REF</sub> pass through a low-frequency operational transconductance amplifier (OTA) to form the voltage V<sub>COMP</sub>, and then V<sub>COMP</sub> is multiplied by V<sub>MULT</sub>. Feedback signal V<sub>FB</sub> may come from the voltage division of the output voltage, the output current detection or primary side regulation (PSR). If the bandwidth of the OTA is controlled to be much lower than input voltage frequency, the output V<sub>COMP</sub> will be a DC voltage with very low ripple. Thus, the output voltage V<sub>MO</sub> of the multiplier is proportional to V<sub>M</sub>. In other word, it is proportional to the input voltage. If the voltage CS related to the inductor peak current is equivalent to the output voltage of the multiplier V<sub>MO</sub>, and the pulse width modulation (PWM) signal is reset to be OFF to turn off the power switch Q<sub>1</sub>. The inductor peak current will be a sine wave with the same phase with the input voltage, which can achieve high power factor.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image020_en.png" ><img width=492 height=260 id="圖片 13" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image020_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 4. The function block diagram of the peak current PFC control </p> <p class=MsoNormal>2.Constant on-time control :</p> <p>The function block diagram of the constant on-time PFC control is shown in figure 5. It uses a ramp generator rather than a multiplier which is expensive and more complex. The simple ramp generator does not need to detect input voltage, and it will generate a voltage ramp V<sub>RAMP</sub> with a constant slope S<sub>RAMP</sub>. When V<sub>RAMP</sub> is equal to V<sub>COMP</sub>, the PWM signal is reset to be OFF to turn off the power switch Q<sub>1</sub>. The way to generate V<sub>COMP</sub> is the same with the peak current PFC control. That is to say, the voltage V<sub>COMP</sub> can also be generated by making feedback signal V<sub>FB</sub> and reference </p> <p>voltage V<sub>REF</sub> pass through an OTA. Similarly, if the bandwidth of the OTA is controlled to be much lower than input voltage frequency, the output V<sub>COMP</sub> will be a DC voltage with very low ripple. Within one period of the line voltage, if V<sub>COMP</sub> is almost constant and the slope S<sub>RAMP</sub> of V<sub>RAMP</sub> is also constant, the one-time t<sub>on</sub> of the power switch Q<sub>1</sub> will be constant, as shown in equation (15). Consequently, the inductor peak current will be a sine wave with same phase with the input voltage, which can achieve high power factor.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image021_en.png" ><img width=298 height=31 id="圖片 33" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image021_en.png" alt="Technical Document Image Preview"></a></p> <p>The appropriate operation range of V<sub>COMP</sub> is limited by the linear region of the OTA. It is usually designed to be about 0.8~4.2V. If the slope S<sub>RAMP</sub> is fixed by the controller, the one-time t<sub>on</sub> will also be limited. According to equation (14), it is apparent that one-time t<sub>on</sub> is related to the inductor L under specific input voltages and input powers. Moreover, if the one-time t<sub>on</sub> is limited, the selection of the inductor will be limited, too. Thus, a RAMP pin may be arranged at some controllers for users to connect external resistors or capacitors to adjust the slope S<sub>RAMP</sub> so as to expand the application range of the controller.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image022_en.png" ><img width=464 height=219 id="圖片 14" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image022_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 5. The function block diagram of the constant on-time PFC control </p> <p class=MsoNormal>Both of the above two control methods can be operated in CRM or DCM. If in CRM, the controller should have a zero current detection circuit. When detecting that the secondary current of the flyback converter drops to zero, the controller turns on the power switch Q<sub>1</sub>. If in DCM, the controller should have an oscillator in order to turn on the power switch Q<sub>1</sub> at the constant period t<sub>s</sub>. An R<sub>T</sub> (or C<sub>T</sub>) pin may be arranged at some DCM controllers for users to connect external resistors or capacitors to adjust the period t<sub>s</sub>.</p> <p><br> <br> </p> <h2 id="__Bookmark__5">5. Input Voltage Feed-forward Compensation</h2> <p>When the constant on-time PFC control is adopted, no matter whether the controller has the RAMP pin for users to adjust the slope S<sub>RAMP</sub> or not, the different input voltages will result in different COMP voltage level V<sub>COMP</sub>. In the controller, the load level is usually estimated according to V<sub>COMP</sub>. For example, if V<sub>COMP</sub> is lower than a certain voltage, the controller will operate in the burst mode to increase the efficiency at the light load. If different input voltages are corresponding to different V<sub>COMP</sub>, the load level entering the burst mode will be different, too, which is not a proper design. The PFC controllers <a href="http://www.richtek.com/product_detail.jsp?s=1115&utm_source=AN012&utm_medium=RTWWW&utm_campaign=AppNote" class="link">RT7300</a> and <a href="http://www.richtek.com/product_detail.jsp?s=1062&utm_source=AN012&utm_medium=RTWWW&utm_campaign=AppNote" class="link">RT7302</a> manufactured by Richtek provide the input voltage feed-forward compensation for the constant on-time control, which can keep V<sub>COMP</sub> almost unchanged under different input voltages. Figure 6 is the function block diagram of the constant on-time PFC control with the input voltage feed-forward compensation. The input of the OTA is voltage Vset, and its output charge the capacitor C<sub>RAMP</sub> until the voltage V<sub>RAMP</sub> is equal to the control voltage V<sub>COMP</sub>. The time period is the constant on-time t<sub>on</sub>.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image023_en.png" ><img border=0 width=318 height=34 id="圖片 35" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image023_en.png" alt="Technical Document Image Preview"></a></p> <p>where the capacitor C<sub>RAMP</sub> and the transconductance Gm<sub>RAMP</sub> are set by the controller. The V<sub>COMP</sub> is acquired by stabilizing the voltage of the negative feedback. Combine equation (14) and equation (16), the V<sub>COMP</sub> can be expressed as follows : </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image024_en.png" ><img border=0 width=319 height=39 id="圖片 36" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image024_en.png" alt="Technical Document Image Preview"></a></p> <p>According to equation (17), it can be seen that if the V<sub>set</sub> is fixed in the controller, V<sub>COMP</sub> will be inversely proportional to V<sub>in,rms</sub>. In figure 6, V<sub>M</sub> is the rectified AC line voltage. V<sub>M</sub> is divided by the resistors R<sub>M1</sub> and R<sub>M2</sub>, and the controller will detect its peak value V<sub>MULT,pk</sub> and multiply it by the constant k to act as V<sub>set</sub>. Thus, V<sub>set</sub> can be expressed as follows :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image025_en.png" ><img border=0 width=320 height=30 id="圖片 37" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image025_en.png" alt="Technical Document Image Preview"></a></p> <p>By substituting equation (18) into equation (17) :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image026_en.png" ><img border=0 width=319 height=42 id="圖片 38" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image026_en.png" alt="Technical Document Image Preview"></a></p> <p>Therefore, if the system parameters are constant, V<sub>COMP</sub> will only vary with P<sub>in</sub> instead of the input voltage. Hence, feed-forward compensation can be achieved.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image027_en.png" ><img border=0 width=491 height=286 id="圖片 15" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image027_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 6. The function block diagram of the constant on-time PFC control with input voltage feed-forward compensation </p> <p><br> <br> </p> <h2 id="__Bookmark__6"><a name=c6>6. Total Harmonic Distortion Optimization</a></h2> <p>In the previous chapters, it is mentioned that the PF and THD of the flyback converter operated in CRM are, theoretically, slightly lower than in DCM. The application note provides a kind of THD optimizer, which can effectively improve the PF and THD of the flyback converter operated in CRM.<br> Substitute equation (9) into equation (11) :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image028_en.png" ><img border=0 width=321 height=38 id="圖片 39" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image028_en.png" alt="Technical Document Image Preview"></a></p> <p>From equation (20), it can be seen that if the on-time t<sub>on</sub> of the power switch is kept unchanged, the input current i<sub>in</sub> and input voltage V<sub>in</sub> still have the relation of conduction duty ratio D<sub>on</sub>. If t<sub>on</sub> can be controlled to be inversely proportional to D<sub>on</sub>, i<sub>in</sub> and V<sub>in</sub> can almost have the same phase. The switching period of the power switch is much lower than the input voltage period. Hence, there is almost no delay during the whole input voltage period if the D<sub>on</sub> of previous switching period is used to adjust the t<sub>on</sub> of the current period. Please refer to figure 7, the THD optimizer is inserted between the V<sub>set</sub> and the OTA, and the ramp slope is modulated by the PWM signal. The ideal waveform of the THD optimizer is shown in figure 8.</p> <p>Accordingly, V<sub>set2</sub> can be expressed as follows :</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image029_en.png" ><img border=0 width=320 height=21 id="圖片 40" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image029_en.png" alt="Technical Document Image Preview"></a></p> <p>Substitute equation (21) into equation (16) :</p> <p class=MsoNormal><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image030_en.png" ><img border=0 width=319 height=31 id="圖片 41" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image030_en.png" alt="Technical Document Image Preview"></a></p> <p class=MsoNormal>As shown in equation (22), t<sub>on</sub> is inversely proportional to D<sub>on</sub> by adopting the THD optimizer, so i<sub>in</sub> and V<sub>in</sub> can almost have the same phase. Figure 9 is the measured waveform of the input voltage V<sub>in</sub> and the input current i<sub>in</sub>, where the input voltage is 230V<sub>AC</sub>, the output voltage is 30V and the output current is 350mA. Under the same system parameters, the THD of the controller without the THD optimizer is about 13.83%. After THD optimizer is adopted, the THD is reduced to 5.28%. From the measured waveform, it is obviously that the waveform of the input current is closer to the sine wave with the same phase with the input voltage after the THD optimizer is adopted. </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image031_en.png" ><img border=0 width=504 height=159 id="圖片 16" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image031_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 7. THD optimizer </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image032_en.png" ><img border=0 width=317 height=251 id="圖片 17" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image032_en.png" alt="Technical Document Image Preview"></a></p> <p>Figure 8. The ideal waveform of the THD optimizer </p> <p><br> <br> </p> <h2 id="__Bookmark__7">7. Conclusion</h2> <p>The application note illustrates the operating principle of the single-stage high power factor flyback converter and describes the constant on-time PFC control can work with input voltage feed-forward compensation to keep COMP voltage level almost constant under different input voltages. In addition, the flyback converter with THD optimizer can significantly decrease input current harmonic, which is verified by implementation results.</p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image033_en.png" ><img border=0 width=411 height=295 id="圖片 19" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image033_en.png" alt="Technical Document Image Preview"></a></p> <p>(a) Without THD optimizer </p> <p><a class="fancybox" href="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image034_en.png" ><img border=0 width=404 height=282 id="圖片 21" src="/content/dam/richtek-eds/resources/application-notes/an012/html-images-en/image034_en.png" alt="Technical Document Image Preview"></a></p> <p>(b) With THD optimizer </p> <p>(V<sub>in</sub> : 100V/div, i<sub>in</sub> : 100mA/div, time : 5ms/div) </p> <p>Figure 9. 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