Cable compensation has been used to compensate the voltage drop due to cable impedance for providing a regulated charging voltage in battery charger applications. This application note uses a novel cable compensation method, which called cable minus compensation, as an example to describe the concept and design criteria for the cable compensation of a PSR flyback converter. The analytic results are also verified by the simulation results.

A flyback converter with primary side regulation (PSR) is widely used in off-line battery charger applications due to low cost and simplicity. In a PSR, the output voltage is indirectly sensed through the auxiliary winding, and good regulation can be achieved with the precise detection circuit. However, in such applications, there is a long cable connected between the adaptor output and the electronic devices, such as cell phone, tablet, and so on. If the output voltage is perfectly regulated, there is a voltage drop at the cable end while the output current flows through the cable impedance. The decreasing charging voltage will extend the charging time and even violate the regulation specification especially for the situation under low output voltage and high output current application. This phenomenon can be illustrated in Figure 1.

Figure 1. The Voltage Drop Due to Cable Impedance

Cable compensation is used to compensate the cable voltage drop by linearly increasing the output voltage V_{O} with the output current I_{O}. Figure 2 shows these two methods used to realize cable compensation. One is called cable plus compensation, which adds the compensation signal K∙I_{O} to the reference voltage V_{REF} and feeds into the non-inverting terminal of the error amplifier. The desired compensation voltage can be accurately reflected on the increment of the reference voltage through the compensation signal K∙ I_{O}, and the DC gain K can be obtained from (1). The other is called cable minus compensation. This scheme subtracts the compensation signal K∙ I_{O} from the feedback voltage V_{FB} and pass through Z_{i} into the inverting terminal of the error amplifier.

However, the output current cannot directly be sensed in PSR applications. Figure 3 shows the circuit diagram of a PSR flyback converter with cable minus compensation. In the diagram, the compensation signal is injected from the signal V_{CS} in the primary side through a buffer with compensator DC gain K_{CC} and a low pass filter (LPF) to indirectly estimate the output current. Current sensing resistor R_{S} is used to transfer the voltage signal V_{CS} from the primary side current signal I_{P}. If the cutoff frequency of LPF or the DC gain K_{CC} is not properly designed, the output voltage may incur oscillation problem and the circuit will be unstable. Therefore, a comprehensive small signal analysis will be provided in the following section for the cable compensator and the feedback control design of a PSR flyback converter.

Figure 2. Cable Compensation Implementation Methods with (A) Cable Plus Compensation, and (B) Cable Minus Compensation.

Figure 3. Circuit Diagram of a PSR Flyback Converter with Cable Minus Compensation.

Figure 4 shows the control block diagram of a PSR flyback converter with cable minus compensation. Table I summaries the transfer functions used in the control block diagram. From the control block diagram as shown in Figure 4, there are two loop gains T_{1} and T_{2}, which are respectively measured at point A and point B, can be found in the feedback loop. They can be expressed as (2) and (3) with reference to the voltage loop gain T_{V} and the current loop gain T_{C}. T_{V} and T_{C} can be respectively represented as (4) and (5).

When the cable compensation involves in the feedback loop, it is surprisingly found that the loop gain T_{2} is a positive feedback loop which the output voltage V_{O} has the same phase with the error amplifier output V_{COM}. The positive feedback loop tends to let system become unstable. However, the system stability can be achieved by imposing a negative feedback loop. The loop gain T_{1} provides a negative feedback loop and is used to determine the system stability. The stability criterion needs to be fulfilled by letting the loop gain T_{1} cross 0 dB with –20 dB/decade slope and have adequate phase margin.

Although the loop gain T_{2} is not used to determine the system stability, it influences the output impedance. From the control block diagram shown in Figure 4, the output impedance can be obtained as (6). Not like the traditional thinking, the output impedance is designed to be as low as possible for achieving good load regulation. In order to provide proper cable compensation, the output impedance is expected to have a negative impedance to mitigate the cable impedance. If the output impedance can be designed as –R_{cable}, the cable impedance seems to be cancelled and the charging voltage is regulated without voltage drop.

Figure 4. Control Block Diagram of a PSR Flyback Converter with Cable Minus Compensation.

Table I : Transfer Functions of a PSR Flyback with Cable Compensation.

Cable compensation can be effectively accomplished by subtracting the compensation signal K∙I_{O} from the feedback voltage V_{FB}. However, in PSR applications, the average signal of V_{CS} with a DC gain K_{CC} is fed as the compensation signal instead. In order to achieve proper cable compensation, the DC gain K_{CC} can be obtained from (7). Lower K_{CC} leads to the output voltage under-compensated, but higher K_{CC} causes the output voltage over-compensated and may incur unstable problem.

LPF is used to obtain the average value of K_{CC}∙ V_{CS} by filtering out the high switching frequency part. When the cutoff frequency is lower, the high frequency signal of K_{CC}∙V_{CS} can be effectively attenuated and the system tends to be more stable. However, it will pay more area with larger passive components and become unattractive for the practical integrated circuit design. Therefore, the cutoff frequency is a trade-off design between the component size and the system performance.

The goal of the compensator design is to find proper compensator gain G_{EA} such that the loop gain T_{1} can meet the bandwidth requirement with specified phase margin. The compensator can be designed according to (8) and (9). When the magnitude of G_{do}∙K_{D} is larger than K_{DP}∙R_{S}∙G_{CC}, G_{d} can be approximated to G_{do}∙K_{D}, which has one pole and one zero at the left hand plane. The compensator can be easily designed like traditional voltage mode control without considering the current loop T_{C}. It provides one pole at origin and one compensation zero to cancel the system’s pole to make the loop gain T_{1} stable by crossing 0 dB with –20 dB/decade slope.

However, when the magnitude of K_{DP}∙R_{S}∙G_{CC} approaches G_{do}∙K_{D}, there are two poles and two zeros existing in G_{d} as shown in (9). As the cutoff frequency of LPF gradually increases, the magnitude of K_{DP}∙R_{S}∙G_{CC} starts to be larger than G_{do}∙K_{D} during some frequency range as shown in figure 5. When this situation happens, the two left-half-plane zeros of G_{d} move to the right-half-plane and the system tends to become unstable. Therefore, the compensator can be designed from (8) by neglecting K_{DP}∙R_{S}∙G_{CC} first. The cutoff frequency of LPF can then be design to let K_{DP}∙R_{S}∙G_{CC} be always less than G_{do}∙K_{D} for system stability.

Figure 5. The Plots of K_{DP}∙R_{S}∙G_{CC} and G_{do}∙K_{D}.

Simulation is used to verify the analytic results, and the parameters are listed as follows. V_{IN} = 156V, V_{Bat} = 5V, I_{O} = 1A, L_{M} = 1.5mH, C_{O} = 1mF, r_{C} = 20mΩ, R_{S} = 4.5Ω, R_{cable} = 240mΩ, NP : NS : NA = 15:1:1.4, f_{S} = 50kHz, V_{REF} = 1.2V, g_{m} = 100μA/V, R_{comp} = 215kΩ, C_{comp} = 12nF, R_{a} = 29kΩ, R_{b} = 6kΩ, R_{1} = 100kΩ, C_{1} = 5nF, and K_{CC} = 400m. Figure 6 shows the simulation waveforms with and without cable compensation, and cable compensation provides proper voltage drop compensation under different load conditions. Figure 7 and figure 8 respectively show the loop gains T_{1} and T_{2}. The simulation results are well matched with the calculation results. The system bandwidth and phase margin can be determined form the loop gain T_{1}, and it can be observed that the loop gain T_{2} is a positive feedback. Figure 9 shows the output impedance. The DC gain of the output impedance is close to R_{cable} but the phase starts from 180°, which means it can provide negative impedance for effectively cancelling the cable impedance.

Figure 6. Simulation Waveforms with and without Cable Compensation.

Figure 7. Bode Plots of Loop Gain T_{1}

Figure 8. Bode Plots of Loop Gain T_{2}

Figure 9. Bode Plots of the Output Impedance.

Figure 10 shows simulation and calculation results with different cutoff frequency of LPF by changing C_{1}. Higher cutoff frequency of LPF incurs unstable problem, and this instability phenomenon can also be predicted according to the loop gain T_{1} proposed in the previous analytic result. The minimum value of C_{1} can be determined from the plots of K_{DP}∙R_{S}∙G_{CC} and G_{do}∙K_{D} with fixed R_{1}. Figure 11 shows the plots of K_{DP}∙R_{S}∙G_{CC} and G_{do}∙K_{D} with different C_{1} values, and it can be found C_{1} has to be greater than 3nF for satisfying the condition that K_{DP}∙R_{S}∙G_{CC} is always less than G_{do}∙K_{D}. The simulation also confirmed the result with the minimum C_{1} equals to 4nF.

Figure 12 shows the bandwidth and the phase margin of loop gain T_{1} with different C_{1} values. From the figure, it can be found that the system tends to have higher bandwidth and phase margin with larger C_{1} value. However, when C_{1} is beyond certain value, the system performance has no significant improvement but extra component size is unnecessarily paid. Therefore, the small signal analysis proposed in this paper provides a useful tool to design the proper cutoff frequency of LPF.

Figure 10. Simulation Waveforms of the Charging Voltage V_{Bat} and Calculation Results of Loop Gain T_{1} with Different C_{1}

Figure 11. The Plots of K_{DP}∙R_{S}∙G_{CC} and G_{do}∙K_{D} with Different C_{1}.

Figure 12. The Bandwidth and the Phase Margin of Loop Gain T_{1} with Different C_{1}

A PSR flyabck converter with cable minus compensation was proposed to tackle the voltage drop due to the cable impedance in battery charger applications. The small signal model presented in this paper provided a comprehensive tool for small signal analysis and feedback control design to fulfill proper cable compensation. The analytic results were also explained and successfully verified by the simulation results.

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