Here is the basic circuit of a PMOS LDO. It
consists of a pass element Q1, a voltage reference and an error
amplifier which controls the pass element. The error amplifier senses
the output voltage via a resistor divider network.
In this drawing, the pass element is a P-channel
MOSFET with the source connected to the input voltage.
The control loop is simple: The error amplifier
controls the P-MOSFET gate to keep the voltage at the feedback pin
at the same level as the voltage reference.
When the output voltage drops due to increased
load or lower input voltage, the error amplifier lowers the gate
voltage with respect to the source. This increases the conduction
level of the P-MOSFET, and the output voltage rises again to the
original regulated voltage.
In this configuration, the MOSFET can be controlled
very close to the MOSFET ON level, which makes it possible to operate
VIN very close to VOUT. But since the gate cannot be pulled lower
than ground level, the input voltage must be high enough to allow
sufficient headroom for the MOSFET gate-source voltage. To ensure
sufficient MOSFET gate drive voltage, LDO's with P-MOSFET pass elements
normally have a minimum input voltage requirement of around
In some applications you may want to drive
an LDO from a very low voltage supply rail. In these cases, you
need to select an LDO with an N-channel MOSFET pass element.
LDO's with N-channel MOSFET pass elements need
to provide a gate drive which is higher than the output voltage.
In order to make it possible to use very low input and output voltages,
many N-MOSFET LDO's have a gate drive circuit that is supplied
by an internal charge-pump or external bias voltage. This
makes it possible to use these LDOs with very low input
voltages, down to 1V.
N-MOSFETs also have better RDS(ON)
than similar sized P-MOSFETs, so their drop-out voltage is also
lower, making it possible to supply more current in low voltage
Below is an example of an NMOS LDO
which provides a clean and stable 1.0V supply from a low 1.5V supply
rail. Due to the low voltage drop of only 0.5V across the
LDO, it can deliver more current without excessive dissipation.